FIG. 1 shows a schematic diagram of a conventional liquid crystal display (LCD) system that comprises an LCD panel 100 and a display controller 130. The LCD panel 100 is divided into a display area 112 and a non-display area 114. The display area 112 comprises a thin film transistor (TFT) array, and the non-display area 114 comprises a gate driver 120 and a source driver 125 to control transistors in the TFT array. The display controller 130 outputs a display control signal for controlling the gate driver 120 and the source driver 125, so as to respectively generate a gate driving signal for controlling the TFT array, and a source driving signal for controlling brightness of displayed pixels.
The display controller 130 receives and processes a video signal to generate a display control signal that is transmitted to the LCD panel 100. The display control signal comprises a vertical synchronization signal Vsync, a horizontal synchronization signal Hsync, a red signal Red, a green signal Green, and a blue signal Blue.
A time period for displaying a scan line on the LCD panel is a cycle of the horizontal synchronization signal Hsync, and a time period for displaying a frame on the display area 112 of the LCD panel is a cycle of the vertical synchronization signal Vsync.
Along with increases in the size and resolution of LCD panels as well as an update rate of a display video, the number of display control signals is also increased, such that a processing speed of a single display controller no longer meets real-time requirements for processing video signals or generating display control signals. Therefore, a solution to a large-scale LCD with high resolution needs to be developed.